1. Field of the Invention
The present invention relates to a current driver and specifically to a current driver used as a display driver for an organic EL (Electro Luminescence) panel, or the like.
2. Description of the Prior Art
<Structure of Conventional Current Driver>
FIG. 11 shows a general structure of a conventional current driver 20. The conventional current driver 20 is referenced to reference current Iref as an input from the outside (e.g., from a current supply). The conventional current driver 20 includes a setting reference transistor T201L, supply reference transistors T201RA and T201RB, transistors T202L, T202RA and T202RB for cascode connection (hereinafter, “cascode connection transistor(s)”), bias voltage generating transistors T204A and T204B, and K driving transistors T205-1 to T205-K (K is a natural number).
The setting reference transistor T201L is connected between a power supply node and the cascode connection transistor T202L, and the gate and drain of the setting reference transistor T201L are connected to each other. The cascode connection transistor T202L is connected between the setting reference transistor T201L and an input/output terminal N201, and the gate and drain of the cascode connection transistor T202L are connected to each other.
The supply reference transistor T201RA is connected between the power supply node and the cascode connection transistor T202RA, and the gate of the supply reference transistor T201RA is connected to the gate of the setting reference transistor T201L. The cascode connection transistor T202RA is connected between the supply reference transistor T201RA and a bias voltage generation transistor T204A, and the gate of the cascode connection transistor T202RA is connected to the gate of the cascode connection transistor T202L. The bias voltage generation transistor T204A is connected between the cascode connection transistor T202RA and a ground node, and the gate and drain of the bias voltage generation transistor T204A are connected to each other.
The supply reference transistor T201RB is connected between the power supply node and the cascode connection transistor T202RB, and the gate of the supply reference transistor T201RB is connected to the gate of the setting reference transistor T201L. The cascode connection transistor T202RB is connected between the supply reference transistor T201RB and the bias voltage generating transistor T204B, and the gate of the cascode connection transistor T202RB is connected to the gate of the cascode connection transistor T202L. The bias voltage generating transistor T204B is connected between the cascode connection transistor T202RB and the ground node, and the gate and drain of the bias voltage generating transistor T204B are connected to each other.
The gate of the bias voltage generation transistor T204A and the gate of the bias voltage generating transistor T204B are connected to a bias voltage line G204. The bias voltage line G204 has a resistance value per unit length, which is represented as “wire resistance R”.
Each of the driving transistors T205-1 to T205-K is connected between an output node OUT, from which output current Iout is output, and the ground node. The gate of each of the driving transistors T205-1 to T205-K is connected to a bias voltage line G204 at an arbitrary position. The driving transistors T205-1 to T205-K are continuously placed such that the driving transistor T205-1 and the driving transistor T205-K are physically most distant from each other. The driving transistor T205-1 and the bias voltage generation transistor T204A are placed in the vicinity of each other. The driving transistor T205-K and the bias voltage generation transistor T204B are placed in the vicinity of each other.
The setting reference transistor T201L, the supply reference transistors T201RA and T201RB, the cascode connection transistors T202L, T202RA and T202RB, the bias voltage generating transistors T204A and T204B, and the driving transistors T205-1 to T205-K are each formed by one or more transistors.
<Conventional Operation>
Next, an operation of the current driver 20 shown in FIG. 11 is described.
First, a current mirror which is formed by the setting reference transistor T201L, the supply reference transistors T201RA and T201RB, and the bias voltage generating transistors T204A and T204B generates bias voltage VbiasA at the gate of the bias voltage generation transistor T204A and bias voltage VbiasB at the gate of the bias voltage generation transistor T204B. Bias voltage VbiasA has a voltage value determined according to the current value of reference current Iref and the transistor characteristic of the bias voltage generation transistor T204A (the relationship between the voltage value of the gate voltage applied at the gate and the current value of the drain current). Bias voltage VbiasB has a voltage value determined according to the current value of reference current Iref and the transistor characteristic of the bias voltage generation transistor T204B.
<Relationship Between Gate Line G204 and Driving Transistors>
The driving transistor T205-1 and the driving transistor T205-K are physically distant from each other and have different transistor characteristics. Therefore, in some cases, the driving transistor T205-1 and the driving transistor T205-K need to have different gate voltages in order to allow currents of the same magnitude to flow therethrough. In general, the transistor characteristics of the driving transistors T205-1 to T205-K linearly vary over the gate line G204.
When the bias voltage generation transistor T204A is placed in the vicinity of the driving transistor T205-1 and the bias voltage generation transistor T204B is placed in the vicinity of the driving transistor T205-K, the transistor characteristics of the transistors become closer. With such an arrangement, bias voltage VbiasA which has a voltage value suitable to the characteristic of the driving transistor T205-1 and bias voltage VbiasB which has a voltage value suitable to the characteristic of the driving transistor T205-K can be generated.
The gate line G204, which has wire resistance R, has a potential obtained by linear interpolation between bias voltage VbiasA and bias voltage VbiasB applied at the both ends of the gate line G204. Thus, output current Iout, which has a current value determined according to the linearly-interpolated potential of the gate line G204, flows through each of the driving transistors T205-1 to T205-K connected to the gate line G204. Therefore, the variation in the transistor characteristic of the driving transistors T205-1 to T205-K and the linearly-changing potential of the gate line are canceled. Thus, output currents Iout flowing through the driving transistors T205-1 to T205-K have the same current value.
However, in the conventional current driver, the gate and drain of the bias voltage generation transistor T204A are connected to each other, and the gate and drain of the bias voltage generation transistor T204B are connected to each other. The gate of the bias voltage generation transistor T204A and the gate of the bias voltage generation transistor T204B are connected by the bias voltage line which has wire resistance R. Therefore, if the voltage value of bias voltage VbiasA and the voltage value of bias voltage VbiasB are different, current ΔIdr which is determined according to the voltage difference flows through the gate line G204. Thus, for example, if the voltage value of bias voltage VbiasA is smaller than the voltage value of bias voltage VbiasB, the current flowing through the bias voltage generation transistor T204B is drain current Idrs flowing from the setting reference transistor T201RB minus current ΔIdr flowing through the gate line G204 (Idrs−ΔIdr), and the current flowing through the bias voltage generation transistor T204A is drain current Idrs from the setting reference transistor T201RA plus current ΔIdr flowing through the gate line G204 (Idrs+ΔIdr). Thus, due to an error generated between the current flowing through the bias voltage generation transistor T204A and the current flowing through the bias voltage generation transistor T204B, there is a possibility that the voltage values of bias voltages VbiasA and VbiasB cannot be set at appropriate values.
In this case, although current ΔIdr flowing through the gate line G204 is decreased by increasing wire resistance R of the gate line G204, the influence of capacitance coupling of the driving transistors T205-1 to T205-K increases.